A liquid crystal display (LCD) panel has a structure in which liquid crystal molecules are held between an array substrate and a counter substrate. The array substrate has a plurality of pixel electrodes and the counter substrate has a plurality of common electrodes. Each common electrode on the counter substrate is opposed against one of the pixel electrodes on the array substrate. The LCD panel includes cells arranged in a matrix form. Each cell incorporates one of the pixel electrodes and one of the common electrodes.
FIG. 1 illustrates an equivalent circuit for a conventional LCD panel 100 and its driving circuit. Conventional LCD panel 100 includes a plurality of data lines such as D(m), D(m+1), and D(m+2), and gate lines such as G(n), G(n+1), and G(n+2). Conventional LCD panel 100 includes a matrix of cells arranged in rows and columns. Each cell includes a thin film transistor (TFT) 10 coupled to one of gate lines (G) and one of data lines (D). The drain electrodes of TFTs 10 of the cells which are in the same column are connected to an associated data line (D), and the gate electrodes of TFTs 10 of the cells which are in the same row are connected to an associated gate line (G). The source electrode of each TFT 10 is connected to a pixel electrode 12. For example, a cell labeled (Xm,Yn) in FIG. 1 includes one of TFTs 10. The drain electrode of TFT 10 of cell (Xm,Yn) is connected to data line D(m), the gate electrode of TFT 10 of cell (Xm,Yn) is connected to gate line G(n), and the source electrode of TFT 10 of cell (Xm,Yn) is connected to one of pixel electrodes 12. For cell (Xm,Yn), a liquid crystal capacitor Clc is formed by its pixel electrode 12 and a common electrode on a counter substrate which is opposite to an array substrate of conventional LCD panel 10. A parasitic capacitor Cgs is formed between the gate and the source electrodes of TFT 10. A storage capacitor Cs of cell (Xm,Yn) is formed between its pixel electrode 12 and gate line G(n+1) which is adjacent to gate line G(n). Conventional LCD panel 100 has a wiring arrangement in which gate line G(n+1) concurrently serves as one common electrode of storage capacitors (Cs) on gate line G(n). This type of LCD panel is called a “Cs-on-gate” type LCD panel and LCD panel 100 is a “Cs-on-gate” type LCD panel.
With reference to FIG. 1, a driving circuit of LCD panel 100 includes an X-driver 110 for providing scanning voltages (Vg) to gate lines (G), a Y-driver 120 for providing driving voltages to data lines (D), and a common electrode driver 130 for providing common voltages (Vcom) to the counter electrodes. X-driver 110 provides scanning voltages (Vg) to LCD panel 100 via gate lines (G) for driving cells sequentially line by line. Y-driver 120 simultaneously provides driving voltages corresponding to image data to each cell of the same line which are turned ON by scanning voltage (Vg). Common electrode driver 130 provides the common voltage (Vcom) to each cell of LCD panel 100 as a reference voltage. By applying scanning voltages, driving voltages, and common voltages to the cells of LCD panel 100, a potential difference is created between pixel electrode 12 and the common electrode of each cell when drivers 110, 120, and 130 drive LCD panel 100. In this condition, liquid crystal molecules filled between pixel electrode 12 and the common electrode of each cell are tilted by an angle which is proportional to the potential difference between pixel electrode 12 and the common electrode so that a specific amount of light can pass through the cell. Thus, the light transmittance of each cell of LCD panel 100 is determined by the potential difference between its pixel electrode 12 and common electrode, which is controlled by the scanning voltage, common voltage, and driving voltage applied to the cell.
When driving cells of LCD panel 100, it is common to intermittently invert the polarity of the potential difference applied to pixel and common electrodes to prevent damage. A line common inversion driving method is often employed in which the polarity of the potential difference is inverted every line period. The polarity of the potential difference is determined by using common voltage (Vcom) as a reference. FIGS. 2 and 3 illustrate driving waveforms of the common voltage (Vcom) and the scanning voltage (Vg) applied to a conventional LCD panel such as panel 100 employing the line common inversion driving method. FIG. 2 illustrates driving waveforms of the common voltage (Vcom) and the scanning voltage (Vg) used to drive inverted lines of conventional LCD panel 100 and FIG. 3 illustrates driving waveforms of the common voltage (Vcom) and the scanning voltage (Vg) used to drive non-inverted lines of conventional LCD panel 100. With reference to FIGS. 2 and 3, Vcom represents voltage levels of common voltages applied to the common electrodes. In conventional LCD panel 100 employing the line common inversion driving method, the voltage level of the common voltages change from a high voltage level (VCOMH) to a low voltage level (VCOML) when driving inverted lines of LCD panel 100 and change from VCOML to VCOMH when driving non-inverted lines of LCD panel 100.
With reference to FIG. 2, Vg of FIG. 2 represents voltage levels of a scanning voltage applied to an inverted line of cells of LCD panel 100. When turning ON the cells of the inverted line of LCD panel 100, a large positive gate-on voltage VGON is applied to the cells of the inverted line of LCD panel 100. With reference to FIG. 3, Vg of FIG. 3 represents voltage levels of a scanning voltage applied to a non-inverted line of cells of LCD panel 100. When turning ON the cells of the non-inverted line of LCD panel 100, a large positive gate-on voltage VGON is applied to the cells of the non-inverted line of LCD panel 100. With reference again to FIGS. 2 and 3, when the line of cells is OFF, a negative gate-off voltage VGOFF is applied to the line of cells. In conventional LCD panel 100 which employs the line common inversion driving method, the voltage level of the gate-off voltage VGOFF changes from a high voltage level (VGOFFH) to a low voltage level (VGOFFL) when the driving circuit drives each inverted line of LCD panel 100 and changes from VGOFFL to VGOFFH when the driving circuit drives each non-inverted line of LCD panel 100.
In order to decrease effective potential differences between non-inverted lines and inverted lines, the high/low phase of the gate-off scanning voltage (VGOFF) applied to a line of cells is identical with that of the common electrode voltage (VCOM) applied to the line of cells. That is, when the voltage level of the gate-off voltage (VGOFF) applied to a line of cells is high (VGOFFH), the voltage level of common electrode voltage (Vcom) applied to the line of cells is also high (VCOMH). When the voltage level of the gate-off voltage (VGOFF) applied to a line of cells is low (VGOFFL), the voltage level of the common electrode voltage (Vcom) applied to the line of cells is also low (VCOML), as shown in FIGS. 2 and 3.
FIG. 4 illustrates a conventional gate electrode driving circuit 400 for applying gate voltages (Vg) to drive a line of cells of LCD panel 100. Conventional gate electrode driving circuit 400 is a portion of X-driver 110. Conventional gate electrode driving circuit 400 includes a VGOFFH buffer 402 to apply a gate-on voltage VGON when turning ON the line of cells coupled to conventional gate electrode driving circuit 400 and apply a high level of a gate-off voltage VGOFFH when the line of cells coupled to conventional gate electrode driving circuit 400 is OFF. Conventional gate electrode driving circuit 400 further includes a VGOFFL buffer 404 to apply a gate-on voltage VGON when turning ON the line of cells coupled to conventional gate electrode driving circuit 400 and apply a low level of a gate-off voltage VGOFFL when the line of cell coupled to conventional gate electrode driving circuit 400 is OFF. The voltage level of the gate-off voltage VGOFF outputted to the line of cell is controlled by a GSWH switch 406 and a GSWL switch 408. When driving circuit drives non-inverted lines of LCD panel 100 and the line of cell coupled to conventional gate electrode driving circuit 400 is OFF, GSWH switch 406 is turned ON and GSWL switch 408 is turned OFF so that VGOFFH buffer 402 outputs VGOFFH to drive a capacitor load (Cgoff) of the line of cells coupled to conventional gate electrode driving circuit 400. When driving circuit drives inverted lines of LCD panel 100 and the line of cell coupled to conventional gate electrode driving circuit 400 is OFF, GSWH switch 406 is turned OFF and GSWL switch 408 is turned ON so that VGOFFL buffer 404 outputs VGOFFL to drive the capacitor load (Cgoff) of the line of cell coupled to conventional gate electrode driving circuit 400. Cgoff represents the total of the capacitances of Cgs of the line of cells coupled to conventional gate electrode driving circuit 400. FIG. 5 illustrates exemplary voltage levels of gate-off voltage VGOFF. With reference to FIG. 5, the voltage level of VGOFFH is −7.5volt and the voltage level of VGOFFL is −12volt.
VGON is a positive voltage and both of VGOFFH and VGOFFL are negative voltages. Typically, the magnitude of VGOFFL can be one of (−3)xVIN, (−4)xVIN, (−5)xVIN, and (−6)xVIN. The magnitude of VGOFFH is equal to VGOFFL +|VCOMH-VCOML|. The magnitude of VGON can be one of (+3)xVIN, (+4)xVIN, (+5)xVIN, and (+6)xVIN. VIN is an external input voltage to supply the power to a system incorporating LCD panel 100. For example, batteries can be used to be the external power source to supply VIN to LCD panel 100. Since the magnitude of VGOFFH and VGOFFL are much larger than VIN, VGOFFH buffer 402 and VGOFFL buffer 404 of conventional gate electrode driving circuit 400 must employ a high voltage driving circuit to be able to provide a large positive voltage (VGON) and a large negative voltage (VGOFF) as well as to provide sufficient power to drive capacitor load Cgoff. As a result, the power consumption of conventional gate electrode driving circuit 400 is high in generating VON, VGOFFH and VGOFFL with the magnitudes much larger then receiving input voltage VIN. In addition, the high voltage driving circuit must employ a large chip area to provide VGON, VGOFFH, and VGOFFL, and drive capacitor load Cgoff, which increases the cost of manufacturing conventional gate electrode driving circuit 400.
There is thus a general need in the art for a circuit for driving a LCD panel which requires a minimal chip area and has a relatively low power consumption that overcomes one or more of the deficiencies of conventional driving circuits.